sFPDP Gen3 (VITA 17.3) Release 3.4 now available! This release adds support for the new Xilinx Versal ACAP family featuring GTY transceivers with link rates up to 32 Gbps per line. This new device support, along with advanced 64B/67B encoding, automatic channel bonding, and far-end link status make sFPDP Gen3 the ideal choice for next-generation FPGA interconnect.
This release is recommended only for users requiring Xilinx Versal support. There are no changes from the previous release for non-Versal devices.
Contact us at firstname.lastname@example.org or visit us at www.streamdsp.com for more information.
Release 3.4 supports the following FPGA families...
Altera / Intel
Stratix-10 GX L-Tile
Stratix-10 GX H-Tile
Zynq UltraScale+ GTH
Zynq UltraScale+ GTY
Kintex UltraScale+ GTH
Virtex UltraScale+ GTY
Versal ACAP GTY
If you are a current sFPDP Gen3 (VITA 17.3) customer with an active maintenance agreement and wish to receive this new update, simply respond to this email and let us know. If you are a sFPDP (VITA 17.1) customer and would like to consider sFPDP Gen3 for your next program we would be happy to answer any questions you might have.